Transmission networks can be classified according to their geographical extension, their topology and the transmission protocol they use for transmitting information.
In particular, according to the geographical extension it is possible to identify, for instance, two types of transmission network:
Local Area Network (LAN), where network nodes are rather close to each other, for example inside the same building or group of buildings; and
Wide Area Network (WAN), used for interconnecting LANs that are far from each others.
From the topological point of view, LANs have usually a bus or ring configuration, while WANs may have nodes arranged according to a mesh, a bus or a ring configuration.
With regard to the transmission protocol, networks may be distinguished in circuit switched networks and packet switched networks. In circuit switched networks, information is transported from a source node to a destination node by a continuous stream of digital signals propagating through the network at a constant rate; the stream is organized in a sequence of frames with fixed length and format. Information transmission starts only when a “circuit” (namely, a route interconnecting the source node to the destination node) has been established in the network. The circuit is used to transmit the whole stream of digital signals. SDH/Sonet synchronous protocol and PDH asynchronous protocol are examples of circuit switched network standards.
In contrast, in a packet switched network the information is exchanged in bursts called “packets”. Each packet includes the address of its destination node and is individually transmitted through the network. Each packet is routed node by node according to the traffic conditions; at the destination node, the correct packet sequence is reconstructed to recover the information. Packet length may vary depending on the information type (voice, data or video) and on network features (bit rate, network extension). Ethernet and Resilient Packet Ring (RPR) are examples of packet switched network standards.
Nowadays, there exist integrated transport networks, i.e. networks comprising different LANs interconnected by backbones, where LANs may provide different services, each service being supported by a different network standard, either circuit switched or packet switched. For instance, a single integrated transport network may include LANs providing both Ethernet- and ATM-supported services; in turn, data related to these services may be mapped, for example, according to the SDH/Sonet standard and may be transported along the network backbones according to that standard.
In an integrated transport network, each standard, which is supported by the network, may be represented by a different network layer. Each layer N is interfaced with the two adjacent layers N+1 and N−1. Layer N+1 is Client of layer N, while layer N−1 is Server of layer N. In other words, a signal according to layer N+1 can be suitably mapped and transported in a signal structure according to layer N. In turn, the signal structure according to layer N can be suitably mapped and transported into a signal structure according to layer N−1.
For example, an integrated transport network comprising SDH and Ethernet signals can be represented by a three-layer hierarchy, where Ethernet is layer #3, SDH-Lower Order is layer #2 and SDH-Higher Order is layer #1. In other words, Ethernet is Client of SDH-Lower Order, which is in turn Client of SDH-Higher Order.
The simultaneous presence of a plurality of network layers, i.e. of a plurality of network standards supported by the same integrated transport network, requires multi-service transport apparatuses, suitable for handling all the signals coming from the integrated network at each network layer. In particular, a multi-service transport apparatus should be able to carry out all of the signal processing functions, such as termination, adaptation and switching, according to each network layer. For instance, a multi-service transport apparatus should be able to extract a group of Ethernet packets from an incoming SDH-Higher Order frame, to perform a packet-switching operation on the packets and finally either to transmit the packets over a LAN or to map the packets back in a SDH-Higher Order frame and to transmit the frame through the backbone. Hence, a multi-service transport apparatus comprises input/output ports, switch elements (such as TDM matrices or packet matrices) and interfaces between layers. With such an equipment, the apparatus is able to interconnect each input of each network layer to each output of the same layer and of the other layers.
Different multi-service transport apparatuses are known in the art. These known apparatuses are based on different approaches, depending on the integration level of the signal processing functions related to different layers: “multi network element” approach; and “single network element” approach.
The “multi network element” approach consists in assembling a plurality of single-service shelves, each shelf comprising input/output ports and switch elements, able to manage signals according to one single layer, and interfaces. Yet, such an approach is disadvantageous, since the presence of one shelf for each of the supported layers implies extra-costs, due to a non-optimized exploitation of each shelf and to the management of different shelves, and an increase of the overall dimension of the apparatus.
Lower costs and dimensions can be obtained by a multi-service transport apparatus according to the “single network element” approach, where processing functions related to different layers are integrated into a single shelf. Three different multi-service apparatuses are known. Each of them is based either on a TDM matrix, a packet matrix; or a TDM matrix and a packet matrix.
In the first case, the multi-service apparatus comprises a main TDM matrix (for example a matrix for SDH/Sonet switching) and a plurality of secondary packet matrices with smaller dimensions. Yet, this approach exhibits some disadvantages, such as a reduced scalability of the packet traffic.
In the second case, the apparatus is based on a main packet matrix and on a plurality of input/output ports, the ports comprising interfaces to convert all the incoming traffic into packet-switchable signals. This approach however, even though advantageous with respect to the previous one in terms of scalability, is a non-layered approach, i.e. it is not consistent with the layered structure of the transport network. This prevents the implementation and the coexistence of some network protection mechanisms. Moreover, the interfaces included into the input/output ports are very complex and expensive.
In the third case the apparatus comprises two main matrices, i.e. a TDM matrix and a packet matrix, with input/output ports suitable to direct the incoming traffic on the matrices and means to interface the two matrices. This approach is disadvantageous, since it implies extra-costs due to the presence of the two matrices and of the additional functions aimed to direct the traffic.
As already mentioned, intermediate nodes are responsible for routing information towards respective destination nodes. For instance, intermediate nodes may cross-connect, multiplex, regenerate or amplify information.
In particular, nodes cross-connecting and/or multiplexing information, such as cross-connects and add-drop multiplexers, comprise switches. A switch is a device which is adapted to receive information through a plurality of input lines and selectively send the information to a plurality of output lines, according to the destination node of such information.
In a packet-switched network, a switch (which is also termed packet switch) switches each packet according to the content of its overhead. Typically, each input line of a packet switch is provided with a number of buffers, which equals the number of output lines. Each packet incoming from a given input line is stored into the buffer corresponding to the output line indicated by the overhead content. In each buffer, packets are stored in a queue, where they wait to be taken by the respective output line. An output controller is provided for each set of buffers associated to a same output line. The output controller receives from each buffer connected to it information about the state of the queue (number of packets, packet sizes, etc.). According to these information, each output controller instructs its respective output line to take packets from the buffers associated thereto. The output controller determines the order according to which packets must be taken, in order to avoid buffer saturation and switch congestion.
In a packet switch, switching is thus dynamically controlled, according to the overhead content of each incoming packet.
Besides, in synchronous circuit-switched networks, a switch (which is termed TDM switch) switches each tributary channel according to its position into the TDM flow.
A TDM switch comprises a TDM matrix, which is typically implemented as a memory. Each matrix input is adapted to write in predetermined portions of the memory in predetermined time slots. Besides, each matrix output is adapted to read from predetermined portions of the memory in predetermined time slots. The predetermined time slots are estimated by recovering the reference clock signal of the synchronous network, so that writing and reading operations are synchronized.
Each TDM switch has a routing table indicating, for each matrix output, an ordered list of the tributary channels that must be taken by the matrix output. The routing table of a TDM switch is static, i.e. it is modified only when changes in the channel configuration occur (e.g. one or more tributary channels are switched on or switched off).
Each matrix output is provided with a source address generator. The source address generator of each matrix output generates, by processing the information contained into the static routing table, an ordered list of source addresses. A source address is a memory address indicating the position of the memory portions containing the tributary channel to be taken, as it will be described in greater detail herein after.